Verification Methods for Weaker Shared Memory Consistency Models

نویسندگان

  • Rajnish Ghughal
  • Ganesh Gopalakrishnan
چکیده

The problem of verifying nite-state models of shared memory multiprocessor coherence protocols for conformance to weaker memory consistency models is examined. We start with W.W. Collier's architectural testing methods and extend it in several non-trivial ways in order to be able to handle weaker memory models. This, our rst contribution, presents the construction of architectural testing programs similar to those constructed by Collier (e.g. the Archtest suite) suited for weaker memory models. Our own primary emphasis has, however, been to adapt these methods to the realm of model-checking. In an earlier e ort (joint work with Nalumasu and Mokkedem), we had demonstrated how to adapt Collier's architectural testing methods to model-checking. Our veri cation approach consisted of abstracting executions that violate memory orderings into a xed collection of automata (called Test Automata) that depend only on the memory model. The main advantage of this approach, called Test Model-checking, is that the test automata remain xed during the iterative design cycle when di erent coherence protocols that (presumably) implement a given memory model are being compared for performance. This facilitates `push-button' re-veri cation when each new protocol is being considered. Our second contribution is to extend the methods of constructing test automata to be able to handle architectural tests for weaker memory models. After reviewing prior work, in this paper we mainly focus on architectural tests for weaker memory models and the new abstraction methods thereof to construct test automata for weaker memory models. An extended version of this paper is available through www.cs.utah.edu/formal_verification/ under `Publications'

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Towards a Unified Verification Theory for Various Memory Consistency Models

Memory consistency models (e.g., Total Store Ordering (TSO), Partial Store Ordering (PSO), and Relaxed Memory Ordering [7]) specify behaviors of shared memories that are simultaneously accessed by multiple threads. For example, consider the program (x = 1; y = 1) ∥ (r0 = y; r1 = x) that consists of two threads where ∥ denotes a parallel composition, r0 and r1 are thread-local variables, x and y...

متن کامل

Formal Verification of Delayed Consistency Protocols

In a cache-coherent, shared-memory multiprocessor system, data consistency among cached copies can be delayed until synchronization points under relaxed memory consistency models. Some protocols called delayed consistency protocols take advantage of this flexibility to reduce cache miss rates and memory traffic. However, they are very complex and validating their correctness, even at the behavi...

متن کامل

Formal Automatic Verification of Cache Coherence in Multiprocessors with Relaxed Memory Models

Shared-Memory Multiprocessor, relaxed memory consistency models, delayed consistency, verification, symbolic state model State-based, formal methods have been successfully applied to the automatic verification of cache coherence in sequentially consistent systems. However, coherence in shared-memory multiprocessors under a relaxed memory model is much more complex to verify automatically. With ...

متن کامل

WOMM: A Weak Operational Memory Model

Memory models of shared memory concurrent programs define the values a read of a shared memory location is allowed to see. Such memory models are typically weaker than the intuitive sequential consistency semantics to allow efficient execution. In this paper, we present WOMM (abbreviation for Weak Operational Memory Model) that formally unifies two sources of weak behavior in hardware memory mo...

متن کامل

Performance of Weak Consistency Schemes on the DEC

The performance of a shared memory multiprocessor is largely dependent upon the model of shared memory that is presented to the user. Where the rst such machines typically supported a very powerful model of shared memory, that of sequential consistency , more recent designs have often beneeted from the use of weaker memory models. However, there has been little standardisation between these wea...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2000